Transistor Scaling: Volume 913: Methods, Materials and Modeling (MRS Proceedings)
Transistor Scaling: Volume 913: Methods, Materials and Modeling by Scott Thompson, published by Cambridge University Press on November 7, 2006, spans 205 pages and is presented in English. This edition explores the advancements in silicon CMOS transistor technology over the past four decades, highlighting the geometric scaling that has driven increases in circuit integration density and performance. As transistor dimensions shrink below 35nm, the book addresses the physical limitations that arise, such as off-state leakage current and power density, which complicate further scaling efforts.
Readers will find discussions on innovative device structures and materials necessary for continued CMOS device scaling. The text delves into the emergence of strained silicon and the potential introduction of multigate FETs as solutions to the challenges posed by diminishing gate lengths and oxide thicknesses. This volume features expanded presentations on technology development, providing insights into the physical models and results related to MOSFETs, making it a valuable resource for those interested in integrated circuits and transistor circuits.
Official synopsis Publisher
For the past four decades, geometric scaling of silicon CMOS transistors has enabled not only an exponential increase in circuit integration density – Moore’s Law – but also a corresponding enhancement in the transistor performance. Simple MOSFET geometric scaling has driven the industry to date. However, as the transistor gate lengths drop below 35nm and the gate oxide thickness is reduced to 1nm, physical limitations such as off-state leakage current and power density make geometric scaling an increasingly challenging task. In order to continue CMOS device scaling, innovations in device structures and materials are required and the industry needs a new scaling vector. Starting at the 90 and 65nm technology generation, strained silicon has emerged as one such innovation. Other device structures such as multigate FETs may be introduced to meet the scaling challenge. This book shares results and physical models related to MOSFETs and to discuss innovative approaches necessary to continue the transistor scaling. Expanded versions of presentations in the areas of technology development are featured
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