Mips Risc Architecture

Mips Risc Architecture by Gerry Kane is a comprehensive reference manual published by Pearson College Div in 1991. This second revised edition spans 544 pages and is presented in English. The book provides an in-depth exploration of the MIPS RISC architecture, detailing the user Instruction Set Architecture (ISA) as it pertains to the R2000, R3000, R4000, and R6000 processors, collectively referred to as the R-Series.
Readers will find a structured approach to understanding the characteristics of the CPU in the first six chapters, while the subsequent chapters focus on the Floating Point Unit (FPU). The text covers the general characteristics and capabilities of each RISC processor, including the programming model, memory management unit (MMU), and associated registers. Additionally, it offers insights into the fundamental concepts that differentiate RISC architecture from Complex Instruction Set Computer (CISC) architecture, making it a valuable resource for those interested in microprocessors.
Official synopsis Publisher
A complete reference manual to the MIPS RISC architecture, this book describes the user Instruction Set Architecture (ISA), by the R2000, R3000, R4000, and R6000 (collectively known as the R-Series) processors, together with an extension to this ISA. Focusing on the new R4000 and R6000 chips, this book is organized into two major sections: Chapters 1 through 6 describe the characteristics of the CPU, while Chapter 7 through 9 describe the Floating Point Unit (FPU). This book describes the general characteristics and capabilities of each RISC processor, along with a description of the programming model, memory management unit (MMU), and the registers associated with each processor. Also included is an overview of the underlying concepts that distinguish RISC architecture from Complex Instruction Set Computer (CISC) architecture.
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