Power Integrity for Nanoscale Integrated Systems

Power Integrity for Nanoscale Integrated Systems by Masanori Hashimoto, published by McGraw-Hill Professional on March 19, 2014, is a comprehensive resource that explores the critical aspects of power integrity in integrated circuit design. This 416-page book addresses the challenges posed by power integrity degradation, offering insights into the latest design trends, including low-power design strategies. It emphasizes the importance of understanding phenomena related to power integrity and provides methods for forecasting potential issues early in the design process.

Readers will find detailed discussions on various topics, including the impact of supply and substrate noise on circuits, clock generation and distribution, and the significance of robust circuit design. The book also includes practical examples and a case study on the IBM POWER7+ processor, illustrating real-world applications of the techniques presented. Coverage extends to advanced modeling approaches for power integrity, such as lumped, distributed, and 3D modeling, as well as the implications of chip temperature on power integrity. This edition serves as a valuable guide for professionals in technology and engineering, particularly those focused on telecommunications, nanotechnology, and electronics.