SAT-Based Scalable Formal Verification Solutions
SAT-Based Scalable Formal Verification Solutions by Malay Ganai, published by Springer US on November 19, 2010, is a comprehensive exploration of scalable SAT-based techniques essential for functional verification in chip design. This softcover reprint of the hardcover first edition from 2007 spans 330 pages and is presented in English. The book delves into various innovative methods, including Hybrid SAT Solver, Customized Bounded/Unbounded Model Checking, and Distributed Model Checking, all aimed at addressing the complexities of design verification.
Readers will find detailed algorithmic insights and engineering perspectives that facilitate the implementation of scalable verification approaches. The text discusses practical experiences and recommendations for verifying large industry designs using the VeriSol platform. This work is particularly relevant for researchers, scientists, and verification engineers seeking a deeper understanding of SAT-based techniques, as well as CAD tool developers interested in integrating advanced verification methods into their products.
Official synopsis Publisher
Functional verification has become an important aspect of the chip design process. Significant resources, both in industry and academia, are devoted to the design complexity and verification endeavors.
SAT-Based Scalable Formal Verification Solutions discusses in detail several of the latest and interesting scalable SAT-based techniques including: Hybrid SAT Solver, Customized Bounded/Unbounded Model Checking, Distributed Model Checking, Proofs and Proof-based Abstraction Methods, Verification of Embedded Memory System & Multi-clock Systems, and Synthesis for Verification Paradigm. These techniques have been designed and implemented in a verification platform Verisol (formally called DiVer) and have been used successfully in industry. This book provides algorithmic details and engineering insights into devising scalable approaches for an effective realization. It also includes the authors’ practical experiences and recommendations in verifying the large industry designs using VeriSol.
The book is primarily written for researchers, scientists, and verification engineers who would like to gain an in-depth understanding of scalable SAT-based verification techniques. The book will also be of interest for CAD tool developers who would like to incorporate various SAT-based advanced techniques in their products.
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